Описание

Dual Core Risc Processor with configurable hardware using Verilog | Kumar Nishant | KS OmniScriptum Publishing, 2015 | Английский язык

Name: Dual Core Risc Processor with configurable hardware using Verilog | Kumar Nishant | KS OmniScriptum Publishing, 2015 | Английский язык
Brand: OMNIScriptum
SKU: 101874593430
Price: 3750 RUB
Availability: InStock

Артикул Маркета

103031761504

ISBN

9783659417887

Внешний вид товаров и/или упаковки может быть изменён изготовителем и отличаться от изображенных на Яндекс Маркете.

Все характеристики

Пэй

6 778 ₽

–45%

–200 ₽

С доставкой по клику

Заказ от 1500₽

Dual Core Risc Processor with configurable hardware using Verilog | Kumar Nishant | KS OmniScriptum Publishing, 2015 | Английский язык

Задать вопрос

Пэй

6 778 ₽

–45%

Доставка Маркета

5 окт, по клику 0 ₽

Москва

5 окт, пункт выдачи 0 ₽

Москва

14 дней на возврат

О возвратах

Т8 Издательские Технологии

Магазин

4.8 1.2K оценок

19.1Kзаказов

595подписчиков

6лет на Маркете

О товаре

Описание

Печатная книга Dual Core RISC Processor with configurable hardware using VERILOG в мягкой обложке, язык - английский. В книге 68 страниц, она напечатана на белой офсетной бумаге плотностью 80 г/м². Формат издания - 152x229 мм. Все книги аккуратно упаковываем в прочный трехслойный сейф-пакет. This book proposes design and architecture of a dynamically scalable dual-core pipelined processor. Methodology of the design is the core fusion of two processors where two independent cores can dynamically morph into a larger processing unit, or they can be used as distinct processing elements to achieve high sequential performance and high parallel performance. Processor provides two execution modes. Mode1 is multiprogramming mode for execution of streams of instruction of lower data width, i.e, each core can perform 16-bit operations individually. Performance is improved in this mode due to the parallel execution of instructions in both the cores at the cost of area. In mode2, both the processing cores are coupled and behave like single, high data width processing unit, i.e, can perform 32-bit operation. Additional core-to-core communication is needed to realise this mode. The mode can switch dynamically; therefore, this processor can provide multifunction with single design. Design and verification of processor has been done successfully using Verilog on Xilinx 14.1 platform. The processor is verified in both simulation and synthesis with the help of test programs.